class
CaseStatementRepresents a case statement.
Base classes
- class Statement
- The base class for all statements in SystemVerilog.
Public types
- struct ItemGroup
- A group of items in a case statement.
Public variables
- const Expression& expr
- The controlling case condition.
-
std::
span<ItemGroup const > items - A list of items to match against.
- const Statement* defaultCase
- An optional default case item that applies if no items match.
- CaseStatementCondition condition
- The kind of case condition to evaluate.
- UniquePriorityCheck check
- An optional unique or priority check that should be applied to the condition.