Classes
-
namespace slang Root namespace.
-
namespace ast The SystemVerilog AST.
- class AbortAssertionExpr Represents an abort (accept_on / reject_on) property expression.
- class ArbitrarySymbolExpression
- class AssertionInstanceExpression
- class AssertionPortSymbol
- class AssignmentExpression Represents an assignment expression.
- class AssignmentPatternExpressionBase Base class for assignment pattern expressions.
- class AssociativeArrayType Represents an unpacked array that provides associative lookup.
-
class ASTContext
- struct AssertionInstanceDetails Information required to instantiate a sequence or property instance.
- struct RandomizeDetails
- struct ASTVisitor
- class BinaryAssertionExpr Represents a binary operator in a sequence or property expression.
- class BinaryExpression Represents a binary operator expression.
- class BlockStatement Represents a sequential or parallel block statement.
- class CallExpression Represents a subroutine call.
- class CaseAssertionExpr Represents a case operator in a property expression.
- class CHandleType Represents storage for pointers passed using the DPI (a "C" compatible handle).
- class ClassBuilder A helper class for constructing class types programmatically.
- class ClassType Represents a class definition type.
- class ClockingAssertionExpr Represents an assertion expression with attached clocking control.
- class ClockingBlockSymbol Represents a clocking block.
- class ClockingEventExpression
- class ClockingSkew Represents a skew value that is applied to clocking block signals.
- class ClockVarSymbol Represents a clocking block signal.
- class Compilation
- struct CompilationOptions Contains various options that can control compilation behavior.
- class CompilationUnitSymbol The root of a single compilation unit.
- class ConcatenationExpression Represents a concatenation expression.
- class ConditionalAssertionExpr Represents a conditional operator in a property expression.
- class ConditionalConstraint Represents a constraint defined by an if-else condition.
- class ConditionalExpression Represents a conditional operator expression.
- class ConstraintBlockSymbol Represents a named constraint block declaration within a class.
- class ConstraintList Represents a list of constraints.
- class ContinuousAssignSymbol Represents a continuous assignment statement.
- class ConversionExpression Represents a type conversion expression (implicit or explicit).
- class CopyClassExpression Represents a
new
expression that copies a class instance. - class CoverCrossBodySymbol
- class CovergroupBodySymbol
- class CovergroupType Represents a covergroup definition type.
- class DataTypeExpression
- class DeclaredType
- class DefParamSymbol Represents a defparam directive.
- class DisableIffAssertionExpr Represents a disable iff condition in a property spec.
- class DisableSoftConstraint Represents a constraint that disables a soft random variable.
- class DistExpression
- class DPIOpenArrayType
- class DynamicArrayType Represents a dynamically sized unpacked array.
- class ElabSystemTaskSymbol Represents an elaboration system task, such as $error or $warning.
- class ElementSelectExpression Represents a single element selection expression.
- class EmptyArgumentExpression
- class EmptyMemberSymbol
- class EmptyStatement Represents an empty statement, used as a placeholder or an anchor for attributes.
- class EnumType Represents an enumerated type.
- class EnumValueSymbol Represents an enumerated value / member.
- class ErrorType
-
class EvalContext
- struct Frame Represents a single frame in the call stack.
- class EventType
- class ExplicitImportSymbol Represents an explicit import from a package.
- class Expression The base class for all expressions in SystemVerilog.
- class ExpressionConstraint Represents a constraint defined by a logical expression.
- class FieldSymbol Represents a field member of a struct or union.
- class FirstMatchAssertionExpr Represents a first_match operator in a sequence expression.
- class FixedSizeUnpackedArrayType
- class FloatingType
- class ForeachConstraint Represents a constraint that iterates over the elements of an array.
- class FormalArgumentSymbol Represents a formal argument in subroutine (task or function).
- class ForwardingTypedefSymbol
- class GenerateBlockArraySymbol Represents an array of generate blocks, as generated by a loop generate construct.
- class GenerateBlockSymbol
-
class GenericClassDefSymbol
- class iterator An iterator for specializations of the generic class.
- class GenvarSymbol Represents a genvar declaration.
- class HierarchicalValueExpression Represents an expression that references a named value via hierarchical path.
- struct HierarchyOverrideNode
- class ImplicationConstraint Represents a constraint defined by an implication.
- class InsideExpression Represents a set membership operator expression.
- class InstanceSymbolBase Common functionality for module, interface, program, and primitive instances.
- class IntegerLiteral Represents an integer literal.
- class IntegralType
- class InterfacePortSymbol
- class InvalidExpression
- class InvalidStatement
- class IteratorSymbol Represents an iterator variable created for array manipulation methods.
- class LetDeclSymbol Represents a let declaration.
- class LocalAssertionVarSymbol
- class Lookup Centralized functionality for looking up symbols by name in the AST.
- class LookupLocation
-
struct LookupResult A structure that contains the results of a name lookup operation.
- struct MemberSelector
- class LValue
- class LValueReferenceExpression
- class MemberAccessExpression Represents an access of a structure variable's members.
- class MethodBuilder A helper class for constructing method symbols programmatically.
- class MinTypMaxExpression Represents a min:typ:max expression.
- class ModportClockingSymbol Represents a clocking block port.
- class ModportPortSymbol Represents a single port specifier in a modport declaration.
- class ModportSymbol Represents a modport within an interface definition.
- class MultiPortSymbol
- class NamedValueExpression Represents an expression that references a named value.
- class NetSymbol Represents a net declaration.
- class NetType
- class NewArrayExpression Represents a new[] expression that creates a dynamic array.
- class NewClassExpression Represents a
new
expression that creates a class instance. - class NewCovergroupExpression Represents a
new
expression that creates a covergroup instance. - class NullLiteral Represents a null literal.
- class NullType
- class OpenRangeExpression
- class PackageSymbol A SystemVerilog package construct.
- class PackedArrayType
- class PackedStructType Represents a packed structure of members.
- class PackedUnionType Represents a packed union of members.
- class ParameterSymbol Represents a parameter value.
- class Pattern
- class PatternVarSymbol Represents a pattern variable materialized for a pattern matching expression.
- class PortSymbol
- class PredefinedIntegerType Represents the predefined integer types, which are essentially predefined vector types.
- class PropertySymbol Represents a named property object.
- class PropertyType Represents the type of property instances and arguments.
- class QueueType Represents an unpacked array that provides queue semantics.
- class RangeSelectExpression Represents a range selection expression.
- class RealLiteral Represents a real number literal.
- class ReplicatedAssignmentPatternExpression Represents a replicated assignment pattern expression.
- class ReplicationExpression Represents a replication expression.
- class RootSymbol Represents the entirety of a design, along with all contained compilation units.
- class ScalarType Represents the single-bit scalar types.
-
class Scope
- class iterator An iterator for members in the scope.
- class ScriptSession
- class SequenceConcatExpr Represents an assertion expression defined as a delayed concatenation of other expressions.
- struct SequenceRange Represents a range of potential sequence matches.
- struct SequenceRepetition Encodes a repetition of some sub-sequence.
- class SequenceSymbol Represents a named sequence object.
- class SequenceType Represents the type of sequence instances and arguments.
- class SequenceWithMatchExpr
- class SimpleAssertionExpr Represents an assertion expression defined as a simple regular expression.
- class SimpleAssignmentPatternExpression Represents an assignment pattern expression.
- class SimpleSystemSubroutine
- class SolveBeforeConstraint Represents a constraint that enforces ordering of solving variables.
- class SpecparamSymbol Represents a specify parameter.
-
class Statement The base class for all statements in SystemVerilog.
- struct StatementContext Additional information passed along during statement creation.
- class StatementList Represents a list of statements.
- class StreamingConcatenationExpression Represents a streaming concatenation.
- class StringLiteral Represents a string literal.
- class StringType Represents an ASCII string type.
- class StrongWeakAssertionExpr Represents a strong or weak operator in a property expression.
- class StructBuilder A helper class for constructing struct types programmatically.
- class StructuredAssignmentPatternExpression Represents an assignment pattern expression.
- class SubroutineSymbol Represents a subroutine (task or function).
- class Symbol
- class TaggedUnionExpression Represents a tagged union member setter expression.
- class TempVarSymbol
- class TimeLiteral Represents a time literal.
- class TransparentMemberSymbol
- class Type
- class TypeAliasType Represents a type alias, which is introduced via a typedef or type parameter.
- class TypeReferenceExpression
- class TypeRefType Represents the result of a type reference expression, i.e. the type() operator.
- class UnaryAssertionExpr Represents a unary operator in a property expression.
- class UnaryExpression Represents a unary operator expression.
- class UnbasedUnsizedIntegerLiteral Represents an unbased unsized integer literal, which fills all bits in an expression.
- class UnboundedLiteral Represents the unboudned queue or range literal.
- class UnboundedType
- class UninstantiatedDefSymbol
- class UniquenessConstraint Represents a constraint that enforces uniqueness of variables.
- class UnpackedStructType Represents an unpacked structure of members.
- class UnpackedUnionType Represents an unpacked union of members.
- class UntypedType Represents an 'untyped' type, which is used for e.g. arguments of sequences.
- class ValueDriver
- class ValueExpressionBase Common base class for both NamedValueExpression and HierarchicalValueExpression.
- class ValueSymbol
- class VariableSymbol Represents a variable declaration.
- class VirtualInterfaceType Represents a virtual interface type.
- class VoidType
- class WildcardImportSymbol
- namespace driver Frontend tool driver.
-
namespace parsing Lexing, preprocessing, and parsing functionality.
- class Lexer
- struct LexerOptions Contains various options that can control lexing behavior.
- struct NumericTokenFlags Various flags for numeric tokens.
- class Parser Implements a full syntax parser for SystemVerilog.
-
class ParserBase
- class Window Helper class that maintains a sliding window of tokens, with lookahead.
-
struct ParserMetadata Various bits of metadata collected during parsing.
- struct Node Collection of metadata that can be associated with a syntax node at parse time.
- struct ParserOptions Contains various options that can control parsing behavior.
- class Preprocessor
- struct PreprocessorOptions Contains various options that can control preprocessing behavior.
- class Token
- class Trivia
-
namespace syntax Syntax tree manipulation.
- struct ConstTokenOrSyntax A token or a constant syntax node.
- class DeferredSourceRange
-
class SeparatedSyntaxList
- class iterator_base
- class SyntaxFacts
- class SyntaxList A syntax node that represents a list of child syntax nodes.
- class SyntaxListBase A base class for syntax nodes that represent a list of items.
- class SyntaxNode Base class for all syntax nodes.
- class SyntaxPrinter
- class SyntaxRewriter
- class SyntaxTree
- class SyntaxVisitor
- class TokenList A syntax node that represents a list of child tokens.
- struct TokenOrSyntax A token or a syntax node.
- struct AssociativeArray Represents a SystemVerilog associative array, for use during constant evaluation.
- class Bag
- class bitmask
- struct BufferID
- class BumpAllocator
-
class CommandLine
- struct ParseOptions Contains various options to control parsing of command flags.
- struct ConstantRange
-
class ConstantValue
- struct NullPlaceholder This type represents the null value (class handles, etc) in expressions.
- struct UnboundedPlaceholder This type represents the unbounded value ($) in expressions.
- class CopyPtr
- class CVConstIterator
- class CVIterator
- class DiagCode A compact code that represents a diagnostic.
- class Diagnostic Wraps up a reported diagnostic along with location in source and any arguments.
- class DiagnosticEngine
- class Diagnostics A collection of diagnostics.
- class function_ref
- class IntervalMap A data structure that maps from intervals (closed ranges) to values.
-
class iterator_facade
- class ReferenceProxy
- class iterator_range A range represented by an interator pair, begin and end.
- class JsonWriter
- struct logic_t
- class not_null
- class OS A collection of various OS-specific utility functions.
- class PointerIntPair
- class PoolAllocator A simple pool allocator built on top of a bump allocator.
- struct real_t
- class SafeIndexedVector
- class ScopeGuard
- struct shortreal_t
- class SmallMap
- class SmallSet
- class SmallVector
- class SmallVectorBase Base class for a fast growable array.
- struct SourceBuffer
- class SourceLocation
-
class SourceManager
- struct DiagnosticDirectiveInfo
- class SourceRange Combines a pair of source locations that denote a range of source text.
- class StringTable
- class SVInt
- class SVIntStorage
- struct SVQueue Represents a SystemVerilog queue, for use during constant evaluation.
- struct SVUnion Represents a SystemVerilog unpacked union, for use during constant evaluation.
- struct TimeScale
- struct TimeScaleValue A combination of a unit and magnitude for a time scale value.
- class TimeTrace
- class TimeTraceScope
- class TypedBumpAllocator
- struct UninitializedTag
- class VersionInfo Provides access to compile-time generated version info about the library.
-
namespace ast The SystemVerilog AST.
- namespace std STL namespace.