class
#include <slang/numeric/SVInt.h>
SVInt SystemVerilog arbitrary precision integer type.
This type is designed to implement all of the operations supported by SystemVerilog expressions involving integer vectors. Each value has an arbitrary (but constant) size in bits, up to a maximum of 2**24-1.
Additionally, SVInt can represent a 4-state value, where each bit can take on additional states of X and Z.
Small integer values that fit within 64 bits are kept in a simple native integer. Otherwise, space is allocated on the heap. If there are any unknown bits in the number, an extra set of words are allocated adjacent in memory. The bits in these extra words indicate whether the corresponding bits in the low words are unknown or normal.
Public static variables
-
static bitwidth_
t DefaultStringAbbreviationThresholdBits constexpr - The default threshold, in bits, to use for abbreviating toString results when calling one of the simple toString() methods without passing a user provided threshold.
Public static functions
-
static auto fromString(std::
string_view str) -> SVInt - Constructs from a string (in SystemVerilog syntax).
-
static auto fromDigits(bitwidth_
t bits, LiteralBase base, bool isSigned, bool anyUnknown, std:: span<logic_ t const> digits) -> SVInt - Construct from an array of digits.
-
static auto fromDouble(bitwidth_
t bits, double value, bool isSigned, bool round = true) -> SVInt - Construct from a floating point value.
- static auto conditional(const SVInt& condition, const SVInt& lhs, const SVInt& rhs) -> SVInt
- Evaluates a conditional expression; i.e. condition ? left : right.
-
static auto logicalImpl(const SVInt& lhs,
const SVInt& rhs) -> logic_
t - Implements logical implication: lhs -> rhs. This is equivalent to (!lhs || rhs).
-
static auto logicalEquiv(const SVInt& lhs,
const SVInt& rhs) -> logic_
t - Implements logical equivalence: lhs <-> rhs.
-
static auto concat(std::
span<SVInt const> operands) -> SVInt - Concatenates one or more integers into one output integer.
Constructors, destructors, conversion operators
- SVInt()
- Simple default constructor for convenience, results in a 1 bit zero value.
-
SVInt(logic_
t bit) explicit - Construct from a single bit that can be unknown.
-
template<std::integral T>SVInt(T value)
- Construct from a given integer value. Uses only the bits necessary to hold the value.
-
SVInt(bitwidth_
t bits, uint64_ t value, bool isSigned) - Construct from a 64-bit value that can be given an arbitrarily large number of bits (sign extended if necessary).
-
SVInt(bitwidth_
t bits, std:: span<const byte> bytes, bool isSigned) - Construct from numeric data already in memory as a range of bytes.
- SVInt(const SVInt& other)
- Copy construct.
- SVInt(SVInt&& other) noexcept
- Move construct.
Public functions
- auto isSingleWord() const -> bool
- Check if the integer can fit into a single 64-bit word.
-
auto getNumWords() const -> uint32_
t - Gets the number of words required to hold the integer, including the unknown bits.
-
auto getRawPtr() const -> const uint64_
t* - Gets a pointer to the underlying numeric data.
-
template<std::integral T>auto as() const -> std::
optional<T> - Checks whether it's possible to convert the value to a simple built-in integer type and if so returns it.
- auto toDouble() const -> double
- Convert the integer to a double precision floating point value, rounding where necessary.
- auto toFloat() const -> float
- Convert the integer to a single precision floating point value, rounding where necessary.
- auto isNegative() const -> bool
- Check whether the number is negative.
- auto isOdd() const -> bool
- Check whether a number is odd or even. Ignores the unknown flag.
- void setSigned(bool isSigned)
- Reinterpret the integer as a signed or unsigned value.
- void setAllOnes()
- Set all of the bits in the integer to 1, zero, X, or Z.
- void flattenUnknowns()
- Removes all unknown bits from the number, converting them to zeros.
- void shrinkToFit()
- Resize the number to be the minimum number of bits without changing the stored value.
- auto pow(const SVInt& rhs) const -> SVInt
- Power function.
- auto shl(const SVInt& rhs) const -> SVInt
- Left shifting.
- auto ashr(const SVInt& rhs) const -> SVInt
- Arithmetic right shifting.
- auto lshr(const SVInt& rhs) const -> SVInt
- Logical right shifting.
- auto replicate(const SVInt& times) const -> SVInt
- Multiple concatenation/replication.
-
auto reductionOr() const -> logic_
t - Reduces all of the bits in the integer to one by applying OR, AND, or XOR.
-
auto getActiveBits() const -> bitwidth_
t - Get the number of "active bits".
-
auto getMinRepresentedBits() const -> bitwidth_
t - Get the minimum number of bits required to hold this value, taking into account the sign flag and whether or not the value would be considered positive.
-
auto countLeadingZeros() const -> bitwidth_
t - Count the number of leading zeros.
-
auto countLeadingOnes() const -> bitwidth_
t - Count the number of leading ones.
-
auto countLeadingUnknowns() const -> bitwidth_
t - Count the number of leading unknown bits.
-
auto countLeadingZs() const -> bitwidth_
t - Count the number of leading Z bits.
-
auto countOnes() const -> bitwidth_
t - Count the number of 1 bits in the number.
-
auto countZeros() const -> bitwidth_
t - Count the number of 0 bits in the number.
-
auto countXs() const -> bitwidth_
t - Count the number of X bits in the number.
-
auto countZs() const -> bitwidth_
t - Count the number of Z bits in the number.
-
auto slice(int32_
t msb, int32_ t lsb) const -> SVInt - Return a subset of the integer's bit range as a new integer.
-
void set(int32_
t msb, int32_ t lsb, const SVInt& value) - Replace a range of bits in the number with the given bit pattern.
-
auto sext(bitwidth_
t bits) const -> SVInt - Perform sign extension to the given number of bits.
-
auto isSignExtendedFrom(bitwidth_
t msb) const -> bool - Returns true if all bits in [bitWidth-1:msb] are exactly equal.
-
void signExtendFrom(bitwidth_
t msb) - If bit msb is nonzero, duplicate it to all bits in [bitWidth-1:msb].
-
auto zext(bitwidth_
t bits) const -> SVInt - Perform zero extension to the given number of bits.
-
auto extend(bitwidth_
t bits, bool isSigned) const -> SVInt - Extend the number to the given number of bits, performing sign extension if
isSigned
is true. -
auto trunc(bitwidth_
t bits) const -> SVInt - Truncate the number to the given number of bits.
-
auto resize(bitwidth_
t bits) const -> SVInt - Resize the number to the given number of bits, truncating if smaller, making a copy if the same size, zero extending if larger and unsigned, and sign extending if larger and signed.
- auto reverse() const -> SVInt
- Reverses the bit ordering of the number.
- auto xnor(const SVInt& rhs) const -> SVInt
- Bitwise xnor.
-
auto operator==(const SVInt& rhs) const -> logic_
t - Equality operator; if either value is unknown the result is unknown.
Friends
-
auto operator<<(std::
ostream& os, const SVInt& rhs) -> std:: ostream& - Stream formatting operator.
- auto exactlyEqual(const SVInt& lhs, const SVInt& rhs) -> bool
- Stricter equality, taking into account unknown bits.
-
auto condWildcardEqual(const SVInt& lhs,
const SVInt& rhs) -> logic_
t - Wildcard based equality, with unknown bits as wildcards.
- auto caseXWildcardEqual(const SVInt& lhs, const SVInt& rhs) -> bool
- Wildcard based equality, with unknown bits as wildcards.
- auto caseZWildcardEqual(const SVInt& lhs, const SVInt& rhs) -> bool
- Wildcard based equality, with Z bits as wildcards.
Function documentation
static SVInt slang:: SVInt:: fromString(std:: string_view str)
Constructs from a string (in SystemVerilog syntax).
This is mostly for convenience; any errors will assert instead of being handled gracefully.
static logic_ t slang:: SVInt:: logicalEquiv(const SVInt& lhs,
const SVInt& rhs)
Implements logical equivalence: lhs <-> rhs.
This is equivalent to ((lhs -> rhs) && (rhs -> lhs)).
double slang:: SVInt:: toDouble() const
Convert the integer to a double precision floating point value, rounding where necessary.
Any unknown bits are converted to zero during conversion.
float slang:: SVInt:: toFloat() const
Convert the integer to a single precision floating point value, rounding where necessary.
Any unknown bits are converted to zero during conversion.
bool slang:: SVInt:: isNegative() const
Check whether the number is negative.
Note that this doesn't care about the sign flag; it simply looks at the highest bit to determine whether it is set.
void slang:: SVInt:: setSigned(bool isSigned)
Reinterpret the integer as a signed or unsigned value.
This doesn't change the bits, only the representation.
void slang:: SVInt:: shrinkToFit()
Resize the number to be the minimum number of bits without changing the stored value.
Note that this modifies the value in place.
bitwidth_ t slang:: SVInt:: getActiveBits() const
Get the number of "active bits".
An SVInt might have a large bit width but be set to a very small value, in which case it will have a low number of active bits.
bitwidth_ t slang:: SVInt:: getMinRepresentedBits() const
Get the minimum number of bits required to hold this value, taking into account the sign flag and whether or not the value would be considered positive.
Note that this ignores unknown bits.
bitwidth_ t slang:: SVInt:: countLeadingZeros() const
Count the number of leading zeros.
This doesn't do anything special for unknown values, so make sure you know what you're doing with it.
bitwidth_ t slang:: SVInt:: countLeadingOnes() const
Count the number of leading ones.
This doesn't do anything special for unknown values, so make sure you know what you're doing with it.
logic_ t slang:: SVInt:: operator==(const SVInt& rhs) const
Equality operator; if either value is unknown the result is unknown.
Otherwise, if bit lengths are unequal we extend the smaller one and then compare.
std:: ostream& operator<<(std:: ostream& os,
const SVInt& rhs)
Stream formatting operator.
Guesses a nice base to use and writes the string representation into the stream.
logic_ t condWildcardEqual(const SVInt& lhs,
const SVInt& rhs)
Wildcard based equality, with unknown bits as wildcards.
This method only looks for wildcard bits on the rhs, as needed by the conditional operator.
bool caseXWildcardEqual(const SVInt& lhs, const SVInt& rhs)
Wildcard based equality, with unknown bits as wildcards.
This method implements matching as required by casex statements.
bool caseZWildcardEqual(const SVInt& lhs, const SVInt& rhs)
Wildcard based equality, with Z bits as wildcards.
This method implements matching as required by casez statements.