AssignmentPatternExpressionBase class
Base class for assignment pattern expressions.
Base classes
- class Expression
- The base class for all expressions in SystemVerilog.
Derived classes
- class ReplicatedAssignmentPatternExpression final
- Represents a replicated assignment pattern expression.
- class SimpleAssignmentPatternExpression final
- Represents a simple assignment pattern expression.
- class StructuredAssignmentPatternExpression final
- Represents a structured assignment pattern expression.